I want to setup a new window with tmuxinator with the panes like this:
#########
# 1 # #
##### 3 #
# 2 # #
#########
i.e., two main-vertical panes with the first one having an horizontal one inside of it, something along the lines of:
windows:
- editor:
layout: main-vertical
panes:
- gst
- layout: horizontal
- gulp
- python script.py
Is there a simple way to achieve this without using window dimensions as in this answer ? Or some alternative to tmuxinator?
I started to use tmxup instead, here's the solution:
session_name: statuspage
windows:
- window_name: main dev
layout: main-vertical
shell_command_before:
- workon statuspage
panes:
- shell_command:
- python statuspage.py
- gst
- pwd
You can get close to that pretty easily with
windows:
- cli:
layout: main-vertical
panes:
- one:
- gst
- two:
- gulp
- three:
- python script.py
produces
#########
# # 2 #
# 1 #####
# # 3 #
#########
Related
Hi does anybody knows how to read a text file and put it inside the #startuml and #enduml, the goal of this would be to make the printing of the sequence diagram more automatical inside a jupyter notebook
#startuml
read(~/Doc/trace.txt)
#enduml
thanks in advance for any help
For me having the files:
main.pu
\#startuml
!include file1.puml
\#enduml
with file1.puml (with and without #startuml / #enduml doesn't make a difference:
C -> C : stuff3
D -> D : stuff4
and running:
java -Djava.awt.headless=true -jar plantuml.jar main.pu
Results in:
I used version:
PlantUML version 1.2020.17beta5
i am trying to run an example design by IntelFPGA, using a tcl script provided by Intel. It reports 'error (vlog-7) failed to open unit file "blabla" in read mode. No such file or directory (errno = ENOENT). i can not find the error. Then i tried a modelsim project i used earlier, which used to work. I get the same error! What could be wrong?
At start of tb_run.tcl (run from commandline MODELSIM> VHDL 2008 do tb_run.tcl), this tb_run.tcl file is generated by quartus example
global env ;
# set QUARTUS_INSTALL_DIR "$env(QUARTUS_ROOTDIR)" => initially i thought
# there is something wrong with the rootdir, so i changed to the row
# below:
set QUARTUS_INSTALL_DIR "C:/intelFPGA/18.0/quartus"
set SETUP_SCRIPTS ../setup_scripts
set tb_top_waveform msim_wave.do
set QSYS_SIMDIR "./../setup_scripts"
set TOP_LEVEL_NAME tb_top
source $SETUP_SCRIPTS/mentor/msim_setup.tcl
# Compile device library files
dev_com
================================================
=> dev_com, this is line 29, here the error occurs, see below
modelsim reports:
Modelsim> VHDL 2008 do tb_run.tcl
# C:/intelFPGA/18.0/quartus
# ../setup_scripts
# msim_wave.do
# ./../setup_scripts
# tb_top
# [exec] file_copy
# List Of Command Line Aliases
#
# file_copy -- Copy ROM/RAM files to simulation directory
#
# dev_com -- Compile device library files
#
# com -- Compile the design files in correct order
#
# elab -- Elaborate top level design
#
# elab_debug -- Elaborate the top level design with novopt option
#
# ld -- Compile all the design files and elaborate the top level design
#
# ld_debug -- Compile all the design files and elaborate the top level design with -novopt
#
#
#
# List Of Variables
#
# TOP_LEVEL_NAME -- Top level module name.
# For most designs, this should be overridden
# to enable the elab/elab_debug aliases.
#
# SYSTEM_INSTANCE_NAME -- Instantiated system module name inside top level module.
#
# QSYS_SIMDIR -- Qsys base simulation directory.
#
# QUARTUS_INSTALL_DIR -- Quartus installation directory.
#
# USER_DEFINED_COMPILE_OPTIONS -- User-defined compile options, added to com/dev_com aliases.
#
# USER_DEFINED_VHDL_COMPILE_OPTIONS -- User-defined vhdl compile options, added to com/dev_com aliases.
#
# USER_DEFINED_VERILOG_COMPILE_OPTIONS -- User-defined verilog compile options, added to com/dev_com aliases.
#
# USER_DEFINED_ELAB_OPTIONS -- User-defined elaboration options, added to elab/elab_debug aliases.
#
# SILENCE -- Set to true to suppress all informational and/or warning messages in the generated simulation script.
#
# FORCE_MODELSIM_AE_SELECTION -- Set to true to force to select Modelsim AE always.
# [exec] dev_com
# Model Technology ModelSim - Intel FPGA Edition vlog 10.6c Compiler 2017.07 Jul 26 2017
# Start time: 10:43:14 on Jun 25,2019
# vlog -reportprogress 300 C:/intelFPGA/18.0/quartus/eda/sim_lib/altera_primitives.v -work altera_ver
# ** Error: (vlog-7) Failed to open design unit file "C:/intelFPGA/18.0/quartus/eda/sim_lib/altera_primitives.v" in read mode.
# No such file or directory. (errno = ENOENT)
# End time: 10:43:14 on Jun 25,2019, Elapsed time: 0:00:00
# Errors: 1, Warnings: 0
# ** Error: C:/intelFPGA_pro/18.0/modelsim_ase/win32aloem/vlog failed.
# Error in macro ./tb_run.tcl line 29
# C:/intelFPGA_pro/18.0/modelsim_ase/win32aloem/vlog failed.
# while executing
# "vlog C:/intelFPGA/18.0/quartus/eda/sim_lib/altera_primitives.v -work altera_ver"
# ("eval" body line 1)
# invoked from within
# "eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v" ..."
# invoked from within
# "if [string is false -strict [modelsim_ae_select $FORCE_MODELSIM_AE_SELECTION]] {
# eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_CO..."
# ("eval" body line 5)
# invoked from within
# "dev_com "
Don't really know how you managed to solve this problem simply by rebooting. Here is what the problem most likely was about and how I solved it.
We have a statement about the problem:
vlog-7 error. failed to open design unit file in read mode
I was too focused on the "read mode" and tried to figure out why is it forbidden to start declared operation.
However the problem most likely is that you dont really have the actual file in the directory where warning occured.
Then I realised that I eventually changed the name of the folder and thus this file could not be read. Take a look that you didn't make any changes in pathing till your tcl, .do and project files.
I've been trying to make this work for a while, without much luck:
file_show:
path: /{user}/file/{group}/{file}
controller: Acme\Controller\File::show
requirements:
group: .+
file: .+
# /john/file/acme/group/test/file.zip
# user: john
# group: acme/group
# file: test/file.zip
Does the Symfony Router support multiple params with multiple slashes like this?
No symfony does not support multiple params with slashes straight after each other as ist can not know where one parameter ends and the next one begins.
# /john/file/acme/group/test/file.zip
# user: john
# group: acme/group
# file: test/file.zip
could also be
# /john/file/acme/group/test/file.zip
# user: john
# group: acme
# file: group/test/file.zip
You can work around this by using a different sign between the params and not allow that sign inside the params. docs
I PuTTY to a HP-UX box, and when I run top command, it only displays the first 21 processes. I also see on the top right hand corner of the list there is a header that says Page# 1/12. I need to know, in such environment, how I can navigate/scroll through pages to view other processes. (I have tried everything from PgUp/PgDown, and pretty much every key with Shift/Alt/Ctrl at no avail.
Try increasing the scrollback (default is 200) and using SHIFT+PAGEUP/SHIFT+PAGEDOWN.
http://the.earth.li/~sgtatham/putty/0.60/htmldoc/Chapter3.html#using-scrollback
http://the.earth.li/~sgtatham/putty/0.60/htmldoc/Chapter4.html#config-scrollback
Depending on the environment/tools sometimes just spacebar works for me as well.
To navigate, use the following:
j : Next screen
k : Previous screen
l : First screen
I don't think one can scroll on top output, not sure about HP-UX though I believe it should be same behaviour, Did you try using number (eg. press 2 for second page, or n for next page ..just a guess )
There are couple of option if you want to see all process...
1. use htop where you can use page up/page down (or up and down arrow key) to scroll
2. run the top command only one iteration using -n option and take output in any file
top -b -n 1
3. ps -ef command can give you list of all process, ps command also have option to sort output based on %CPU or %MEM
Can the fill of a vertical slider be reversed? As you can see in the figure, the slider is filling from 12, but I want it to be from -24. Is there any solution?
What's happening What i want
12.0 12.0
-
-
- - - - - 0 - - - - - -
-
-
-
-24.0 -24.0
Update : I'm recently using JMetro css stylesheets for my app.
Well, after the link provided by #Uluk Biy I've got the refurnished code, which itself needed a refurnishment. The problem was still not solved.The slider had just been set to its proper vertical orientation but the track was still filling from bottom. Just open FilledSliderSkin.java, go to line 324, and replace the fill.resizeRelocate(x,y,width,height) with the following :
fill.resizeRelocate(trackLeft,
thumb.getLayoutY(),
trackWidth,
((int)trackLength + trackStart - trackRadius) - thumb.getLayoutY());
Now you're done. :)