Error loading design ModelSim installed with PlayOnMac - modelsim

Question

I've just installed ModelSim Starter Edition on mac with PlayOnMac. After searching a lot through the internet about this problem I've finally decided to ask here. I have my project on this directory "C:/users/crossover/DOCUMENTS/DDB/P0" (notice no spaces - this directory is what ModelSim sees, as I'm in a Mac).
The two codes are inversor1.vhdl
-- Inversor
-- Primer es declara l’entitat
ENTITY inversor IS
PORT (a : IN BIT;
f : OUT BIT);
END inversor;
-- Després es declara l’arquitectura
ARCHITECTURE logica OF inversor IS
BEGIN
f <= not a;
END logica;
and testbench.vhdl
ENTITY testbench IS
END testbench;
-- L’entitat banc de proves no té entrades ni sortides
ARCHITECTURE vectors OF testbench IS
-- Diem què volem testejar
COMPONENT inversor
port(
a: IN BIT;
f: OUT BIT);
END COMPONENT;
-- Definim senyals
SIGNAL a,f : BIT;
-- Diem quants i quins dispositius testeja el programa
FOR DUT: inversor USE ENTITY WORK.inversor(logica);
-- Relacionem el dispositiu i l’arquitectura
BEGIN
DUT: inversor PORT MAP (a,f);
-- Definim els terminals del dispositiu: la connexió entre els senyals que testejem
-- i els que senyals “muts” que porten les ENTITY
PROCESS
BEGIN
a <= '0';
wait for 100 ns;
a <= '1';
wait for 500 ns;
a <= '0';
wait for 1000 ns;
a <= '1';
END PROCESS;
END vectors;
When I try to simulate the project I get this error.
ModelSim> vsim work.testbench(vectors)
# vsim work.testbench(vectors)
# Start time: 08:58:28 on Oct 07,2022
# Error loading design
# End time: 08:58:29 on Oct 07,2022, Elapsed time: 0:00:01
# Errors: 0, Warnings: 0
Which is not verbose at all. If anyone could help me I'd be very thankful.