Is the "loop unrolling" in OpenCL implicit or explicit? - opencl

Question

I have tried adding #pragma unroll and #pragma unroll <loop count> in my OpenCl code but I don't see any improvement in latency. Statements inside the loop are independent and should run in parallel. So, I want to know if OpenCL is implicitly unrolling the loops and that adding the unroll pragma won't help.
Part of my code is like this
for(j = 0; j < 4; j++)
{
m[0][j] = p0[j] + p0[j+4];
m[0][j+4] = p0[j] - p0[j+4];
m[1][j] = p1[j] + p1[j+4];
m[1][j+4] = p1[j] - p1[j+4];
m[2][j] = p2[j] + p2[j+4];
m[2][j+4] = p2[j] - p2[j+4];
m[3][j] = p3[j] + p3[j+4];
m[3][j+4] = p3[j] - p3[j+4];
}
I'm using OpenCL 2.0.
The code after manual unroll is like this
m[0][0] = p0[0] + p0[0+4];
m[0][0+4] = p0[0] - p0[0+4];
m[1][0] = p1[0] + p1[0+4];
m[1][0+4] = p1[0] - p1[0+4];
m[2][0] = p2[0] + p2[0+4];
m[2][0+4] = p2[0] - p2[0+4];
m[3][0] = p3[0] + p3[0+4];
m[3][0+4] = p3[0] - p3[0+4];
m[0][1] = p0[1] + p0[1+4];
m[0][1+4] = p0[1] - p0[1+4];
m[1][1] = p1[1] + p1[1+4];
m[1][1+4] = p1[1] - p1[1+4];
m[2][1] = p2[1] + p2[1+4];
m[2][1+4] = p2[1] - p2[1+4];
m[3][1] = p3[1] + p3[1+4];
m[3][1+4] = p3[1] - p3[1+4];
m[0][2] = p0[2] + p0[2+4];
m[0][2+4] = p0[2] - p0[2+4];
m[1][2] = p1[2] + p1[2+4];
m[1][2+4] = p1[2] - p1[2+4];
m[2][2] = p2[2] + p2[2+4];
m[2][2+4] = p2[2] - p2[2+4];
m[3][2] = p3[2] + p3[2+4];
m[3][2+4] = p3[2] - p3[2+4];
m[0][3] = p0[3] + p0[3+4];
m[0][3+4] = p0[3] - p0[3+4];
m[1][3] = p1[3] + p1[3+4];
m[1][3+4] = p1[3] - p1[3+4];
m[2][3] = p2[3] + p2[3+4];
m[2][3+4] = p2[3] - p2[3+4];
m[3][3] = p3[3] + p3[3+4];
m[3][3+4] = p3[3] - p3[3+4];

Answer 1

Probably compiler is unrolling, but not re-ordering instructions to have best performance.
Maybe it's not about instruction level parallelism nor filling-pipelines.
Maybe it's about memory access patterns.
Just in case of compiler's inability or re-ordering instructions, here is example:
m[0][0] = p0[0] + p0[0+4]; <---- contiguous addr = x
m[0][0+4] = p0[0] - p0[0+4];
m[1][0] = p1[0] + p1[0+4];
m[1][0+4] = p1[0] - p1[0+4];
m[2][0] = p2[0] + p2[0+4];
m[2][0+4] = p2[0] - p2[0+4];
m[3][0] = p3[0] + p3[0+4];
m[3][0+4] = p3[0] - p3[0+4];
m[0][1] = p0[1] + p0[1+4]; <---- contiguous addr = x+1
m[0][1+4] = p0[1] - p0[1+4];
m[1][1] = p1[1] + p1[1+4];
m[1][1+4] = p1[1] - p1[1+4];
m[2][1] = p2[1] + p2[1+4];
m[2][1+4] = p2[1] - p2[1+4];
m[3][1] = p3[1] + p3[1+4];
m[3][1+4] = p3[1] - p3[1+4];
m[0][2] = p0[2] + p0[2+4]; <---- contiguous addr = x+2
m[0][2+4] = p0[2] - p0[2+4];
m[1][2] = p1[2] + p1[2+4];
m[1][2+4] = p1[2] - p1[2+4];
m[2][2] = p2[2] + p2[2+4];
m[2][2+4] = p2[2] - p2[2+4];
m[3][2] = p3[2] + p3[2+4];
m[3][2+4] = p3[2] - p3[2+4];
m[0][3] = p0[3] + p0[3+4]; <---- contiguous addr = x+3
m[0][3+4] = p0[3] - p0[3+4];
m[1][3] = p1[3] + p1[3+4];
m[1][3+4] = p1[3] - p1[3+4];
m[2][3] = p2[3] + p2[3+4];
m[2][3+4] = p2[3] - p2[3+4];
m[3][3] = p3[3] + p3[3+4];
m[3][3+4] = p3[3] - p3[3+4];
so if it is failing because of this, you can try this:
m[0][0] = p0[0] + p0[0+4];
m[0][1] = p0[1] + p0[1+4];
m[0][2] = p0[2] + p0[2+4];
m[0][3] = p0[3] + p0[3+4];
...
and re-order the rest similarly so for all arrays, mem accesses are better. But I'm not sure about m array since it could be row-major or column-major depending on device.