Edsim51 Always Invalid Label Error - microcontroller

I'm using EDSIM51 on MacOS. But I'm always getting Invalid Label - **** is keyword errors. Read documentation (User's Guide and Examples pages) but still no idea where I'm making mistake. I've downloaded example codes from Edsim's website, but it's giving same error for their official examples.
For example,
This is an LCD example which taken from their website:
; put data in RAM
MOV 30H, #'A'
MOV 31H, #'B'
MOV 32H, #'C'
MOV 33H, #0 ; end of data marker
; initialise the display
; see instruction set for details
CLR P1.3 ; clear RS - indicates that instructions are being sent to the module
; function set
CLR P1.7 ; |
CLR P1.6 ; |
SETB P1.5 ; |
CLR P1.4 ; | high nibble set
SETB P1.2 ; |
CLR P1.2 ; | negative edge on E
CALL delay ; wait for BF to clear
; function set sent for first time - tells module to go into 4-bit mode
; Why is function set high nibble sent twice? See 4-bit operation on pages 39 and 42 of HD44780.pdf.
SETB P1.2 ; |
CLR P1.2 ; | negative edge on E
; same function set high nibble sent a second time
SETB P1.7 ; low nibble set (only P1.7 needed to be changed)
SETB P1.2 ; |
CLR P1.2 ; | negative edge on E
; function set low nibble sent
CALL delay ; wait for BF to clear
; entry mode set
; set to increment with no shift
CLR P1.7 ; |
CLR P1.6 ; |
CLR P1.5 ; |
CLR P1.4 ; | high nibble set
SETB P1.2 ; |
CLR P1.2 ; | negative edge on E
SETB P1.6 ; |
SETB P1.5 ; |low nibble set
SETB P1.2 ; |
CLR P1.2 ; | negative edge on E
CALL delay ; wait for BF to clear
; display on/off control
; the display is turned on, the cursor is turned on and blinking is turned on
CLR P1.7 ; |
CLR P1.6 ; |
CLR P1.5 ; |
CLR P1.4 ; | high nibble set
SETB P1.2 ; |
CLR P1.2 ; | negative edge on E
SETB P1.7 ; |
SETB P1.6 ; |
SETB P1.5 ; |
SETB P1.4 ; | low nibble set
SETB P1.2 ; |
CLR P1.2 ; | negative edge on E
CALL delay ; wait for BF to clear
; send data
SETB P1.3 ; clear RS - indicates that data is being sent to module
MOV R1, #30H ; data to be sent to LCD is stored in 8051 RAM, starting at location 30H
loop:
MOV A, #R1 ; move data pointed to by R1 to A
JZ finish ; if A is 0, then end of data has been reached - jump out of loop
CALL sendCharacter ; send data in A to LCD module
INC R1 ; point to next piece of data
JMP loop ; repeat
finish:
JMP $
sendCharacter:
MOV C, ACC.7 ; |
MOV P1.7, C ; |
MOV C, ACC.6 ; |
MOV P1.6, C ; |
MOV C, ACC.5 ; |
MOV P1.5, C ; |
MOV C, ACC.4 ; |
MOV P1.4, C ; | high nibble set
SETB P1.2 ; |
CLR P1.2 ; | negative edge on E
MOV C, ACC.3 ; |
MOV P1.7, C ; |
MOV C, ACC.2 ; |
MOV P1.6, C ; |
MOV C, ACC.1 ; |
MOV P1.5, C ; |
MOV C, ACC.0 ; |
MOV P1.4, C ; | low nibble set
SETB P1.2 ; |
CLR P1.2 ; | negative edge on E
CALL delay ; wait for BF to clear
delay:
MOV R0, #50
DJNZ R0, $
RET
**AND ERROR : ** Invalid Label - FİNİSH is keyword
Can you please tell me what is I'm missing?

Related

uart sending in 8051

In uart, I tried to sent in some numbers that Itried to convert to bcd and then to send.
The code works only from 00 to 99, if I want to send something bigger then 99 it will convert it to an ASCI table to some char or different number.
Could you help me to improve it so that I can to send numbers up to 255?
print_arr:
mov a,#r0
anl a ,#0f0h
swap a
add a , #30h
mov sbuf , a
jnb ti , $
clr ti
mov a , #r0
anl a ,#0fh
add a , #30h
mov sbuf , a
jnb ti , $
clr ti
mov sbuf ,#' ';
jnb ti,$
clr ti
inc r0
djnz r7,print_arr
mov a , #0DH
mov sbuf , a
jnb TI , $
clr TI
mov a , #0AH
mov sbuf , a
jnb TI , $
clr TI
clr TR1
ret
end

Values of a register after executing code

What are the values of r16 and r17 after executing this code?
ldi r16, 0x06 ;load immediate
ldi r17, 0x0c ;load immediate
lsl r16 ;logical shift left
eor r16, r17 ;exclusive or
So I know that r16 = 12 after the logical shift left, making it equal to r17. Does the exclusive or set r16 to 0 and r17 stays at 12? Or do they both get set to zero? Is the zero flag set?
From the obvious source, http://www.atmel.com/webdoc/avrassembler/avrassembler.wb_instructions.Arithmetic_and_Logic_Instructions.html :
EOR Logical Exclusive OR
Rd = Rd EOR Rr
So yes, r16 gets overwritten, but r17 stays unchanged.
http://www.atmel.com/webdoc/avrassembler/avrassembler.wb_EOR.html
even spezifies what happens with the Zero Flag in the status register: It's set to (¯ denoting the inverse,• denoting logical and)
R7¯ • R6¯ • R5¯ • R4¯ • R3¯ • R2¯ • R1¯ • R0¯

Erlang Towers of Hanoi

Currently stuck on trying to implement the towers of hanoi using a collection. I am trying to follow the example in Java using stacks http://www.sanfoundry.com/java-program-implement-solve-tower-of-hanoi-using-stacks/, but I am getting
-module(toh).
-export([begin/0]).
begin() ->
Pegs = 3,
TowerA = createTowerA(N),
TowerB = [],
TowerC = [],
move(Pegs, TowerA, TowerB, TowerC).
%fills Tower A with integers from Pegs to 1.
createTowerA(0) -> [];
createTowerA(N) when N > 0 ->
[N] ++ createTowerA(N - 1).
%displays the towers
display(A, B, C) ->
io:format("~w\t~w\t~w~n", [A, B, C]).
move(Pegs, TowerA, TowerB, TowerC) ->
if Pegs > 0 ->
move(Pegs, TowerA, TowerC, TowerB),
Temp = lists:last(TowerA),
NewTowerC = C ++ Temp,
NewTowerA = lists:sublist(TowerA, length(TowerA) - 1),
display(NewTowerA, B, NewTowerC),
move(Pegs - 1, B, NewTowerA, NewTowerC);
end
When I try running the code, I get this error.
{"init terminating in do_boot",{undef,[{toh,begin,[],[]},{init,begin_i
t,1,[{file,"init.erl"},{line,1057}]},{init,begin_em,1,[{file,"init.erl"},{line,1
037}]}]}}
Crash dump was written to: erl_crash.dump
init terminating in do_boot ()
Can someone see why this is not working? I'm just trying to follow the sanfoundry example.
This code cannot compile, at least the variable C in move/4 is unbound when used. So it seems that you didn't compile this file before trying to execute it.
Although Erlang used a virtual machine, it must be compiled before execution.
There are other problems than the C variable in this code: you call move/4 recursively in the first line of the if, without using any returned value, this cannot have any effect. Also you are using a if statement with a bad syntax. the correct syntax is:
if
GuardSeq1 ->
Body1;
...;
GuardSeqN ->
BodyN % no semicolon at the end of the last body
end
if you intend to use this, beware that you must always have at least one guard that is true, otherwise the code will crash.
My version [edit: remove useless function, better print]:
-module (toh).
-export([start/1]).
start(N) ->
Game = #{1 => lists:seq(1,N), 2 => [], 3 => []},
display(Game,N),
move(N,Game,1,3,N).
move(1,Game,From,To,Size) ->
[H|NewFrom] = maps:get(From,Game),
NewTo = [H|maps:get(To,Game)],
NewGame = maps:update(From,NewFrom,maps:update(To,NewTo,Game)),
display(NewGame,Size),
NewGame;
move(N,Game,From,To,Size) ->
Other = other(From,To),
Game1 = move(N-1,Game,From,Other,Size),
Game2 = move(1,Game1,From,To,Size),
move(N-1,Game2,Other,To,Size).
display(#{1 := A, 2 := B, 3 := C},D) ->
lists:foreach(fun(X) -> print(X,D) end,lists:zip3(complete(A,D),complete(B,D),complete(C,D))),
io:format("~n~s~n~n",[lists:duplicate(6*D+5,$-)]).
complete(L,D) -> lists:duplicate(D-length(L),0) ++ L.
print({A,B,C},D) -> io:format("~s ~s ~s~n",[elem(A,D),elem(B,D),elem(C,D)]).
elem(I,D) -> lists:duplicate(D-I,$ ) ++ lists:duplicate(I,$_) ++ "|" ++ lists:duplicate(I,$_) ++ lists:duplicate(D-I,$ ).
other(I,J) -> 6-I-J.
In the shell:
Eshell V6.1 (abort with ^G)
1> c(toh).
{ok,toh}
2> toh:start(3).
_|_ | |
__|__ | |
___|___ | |
-----------------------
| | |
__|__ | |
___|___ | _|_
-----------------------
| | |
| | |
___|___ __|__ _|_
-----------------------
| | |
| _|_ |
___|___ __|__ |
-----------------------
| | |
| _|_ |
| __|__ ___|___
-----------------------
| | |
| | |
_|_ __|__ ___|___
-----------------------
| | |
| | __|__
_|_ | ___|___
-----------------------
| | _|_
| | __|__
| | ___|___
-----------------------
#{1 => [],2 => [],3 => [1,2,3]}
3>

Removing Left Recursion from CFG

The following grammar has left recursion:
T -> Tx | TYx | YX | x
X -> xx
Y -> Yy | Yx | y
How do you go about removing left recursion. I read the wikipedia explanation, but I'm fairly new to CFGs so it did not make a lot of sense. Any help is appreciated? A plain english explanation would be even more appreciated.
In this example, you can follow Robert C. Moore's general algorithm to convert a rule with left recursion to a rule with right recursion:
A -> A a1 | A a2 | ... | b1 | b2 | ...
# converts to
A -> b1 A' | b2 A' | ...
A' -> e | a1 A' | a2 A' | ... # where e = epsilon
In our first case: A=T, a1=x, a2=Yx, b1=y, b2=x... (similarly for Y)
T -> YXT' | xT'
T' -> e | xT' | YxT'
X -> xx
Y -> yY'
Y' -> e | yY' | xY'

Z80 DAA instruction

Apologies for this seemingly minor question, but I can't seem to find the answer anywhere - I'm just coming up to implementing the DAA instruction in my Z80 emulator, and I noticed in the Zilog manual that it is for the purposes of adjusting the accumulator for binary coded decimal arithmetic. It says the instruction is intended to be run right after an addition or subtraction instruction.
My questions are:
what happens if it is run after another instruction?
how does it know what instruction preceeded it?
I realise there is the N flag - but this surely wouldnt definitively indicate that the previous instruction was an addition or subtraction instruction?
Does it just modify the accumulator anyway, based on the conditions set out in the DAA table, regardless of the previous instruction?
Does it just modify the accumulator anyway, based on the conditions set out in the DAA table, regardless of the previous instruction?
Yes. The documentation is only telling you what DAA is intended to be used for. Perhaps you are referring to the table at this link:
--------------------------------------------------------------------------------
| | C Flag | HEX value in | H Flag | HEX value in | Number | C flag|
| Operation | Before | upper digit | Before | lower digit | added | After |
| | DAA | (bit 7-4) | DAA | (bit 3-0) | to byte | DAA |
|------------------------------------------------------------------------------|
| | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
| ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
| | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
| ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
| | 0 | 9-F | 0 | A-F | 66 | 1 |
| INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
| | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
| | 1 | 0-2 | 0 | A-F | 66 | 1 |
| | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
|------------------------------------------------------------------------------|
| SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
| SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
| DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
| NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
|------------------------------------------------------------------------------|
I must say, I've never seen a dafter instruction spec. If you examine the table carefully, you will see that the effect of the instruction depends only on the C and H flags and the value in the accumulator -- it doesn't depend on the previous instruction at all. Also, it doesn't divulge what happens if, for example, C=0, H=1, and the lower digit in the accumulator is 4 or 5. So you will have to execute a NOP in such cases, or generate an error message, or something.
Just wanted to add that the N flag is what they mean when they talk about the previous operation. Additions set N = 0, subtractions set N = 1. Thus the contents of the A register and the C, H and N flags determine the result.
The instruction is intended to support BCD arithmetic but has other uses. Consider this code:
and 15
add a,90h
daa
adc a,40h
daa
It ends converting the lower 4 bits of A register into the ASCII values '0', '1', ... '9', 'A', 'B', ..., 'F'. In other words, a binary to hexadecimal converter.
I found this instruction rather confusing as well, but I found this description of its behavior from z80-heaven to be most helpful.
When this instruction is executed, the A register is BCD corrected using the contents of the flags. The exact process is the following: if the least significant four bits of A contain a non-BCD digit (i. e. it is greater than 9) or the H flag is set, then $06 is added to the register. Then the four most significant bits are checked. If this more significant digit also happens to be greater than 9 or the C flag is set, then $60 is added.
This provides a simple pattern for the instruction:
if the lower 4 bits form a number greater than 9 or H is set, add $06 to the accumulator
if the upper 4 bits form a number greater than 9 or C is set, add $60 to the accumulator
Also, while DAA is intended to be run after an addition or subtraction, it can be run at any time.
This is code in production, implementing DAA correctly and passes the zexall/zexdoc/z80test Z80 opcode test suits.
Based on The Undocumented Z80 Documented, pag 17-18.
void daa()
{
int t;
t=0;
// 4 T states
T(4);
if(flags.H || ((A & 0xF) > 9) )
t++;
if(flags.C || (A > 0x99) )
{
t += 2;
flags.C = 1;
}
// builds final H flag
if (flags.N && !flags.H)
flags.H=0;
else
{
if (flags.N && flags.H)
flags.H = (((A & 0x0F)) < 6);
else
flags.H = ((A & 0x0F) >= 0x0A);
}
switch(t)
{
case 1:
A += (flags.N)?0xFA:0x06; // -6:6
break;
case 2:
A += (flags.N)?0xA0:0x60; // -0x60:0x60
break;
case 3:
A += (flags.N)?0x9A:0x66; // -0x66:0x66
break;
}
flags.S = (A & BIT_7);
flags.Z = !A;
flags.P = parity(A);
flags.X = A & BIT_5;
flags.Y = A & BIT_3;
}
For visualising the DAA interactions, for debugging purposes, I have written a small Z80 assembly program, that can be run in an actual ZX Spectrum or in an emulation that emulates accurately DAA: https://github.com/ruyrybeyro/daatable
As how it behaves, got a table of flags N,C,H and register A before and after DAA produced with the aforementioned assembly program: https://github.com/ruyrybeyro/daatable/blob/master/daaoutput.txt

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