In a nutshell , the issue is I have some object file (say a.o , b.o ) and some source file (f.c and g.c)
I have to compile and link in a single step.
This is what I am doing but I don't think this is the write way atleast I should give something like -l or -L for linking
gcc -Wall -O0 -ggdb -fPIC a.o b.o f.c g.c -o executable
This is the correct way, -l is used to link to a library (for example, the ptheads library needs -lpthread) and -L is used to add directories to the directories in which the linker looks for library files.
There is nothing wrong with compiling the software this way.
Most build systems build files one at a time in order to avoid having to rebuild the object file in case the source file was not modified and the object file still exists. If you are fine with rebuilding code, then your approach is perfectly valid.
I have a very simple makefile as below:
.PHONY: clean all
CC = /home/utils/gcc-5.2.0/bin/g++
CFLAGS = -Wall -Werror -fPIC
SRC = $(wildcard *.c)
OBJ = $(subst .c,.o,$(SRC))
.INTERMEDIATE: $(OBJ)
all: test.so
%.o: %.c
$(CC) $(CFLAGS) -o $# -c $<
test.so: $(OBJ)
$(CC) -shared $^ -o $#
clean:
#rm -f *.o *~ *.so
I have only two files in the same directory: a.c and b.c
When I execute "make all", I got the following which is perfect.
/home/utils/gcc-5.2.0/bin/g++ -Wall -Werror -fPIC -o a.o -c a.c
/home/utils/gcc-5.2.0/bin/g++ -Wall -Werror -fPIC -o b.o -c b.c
/home/utils/gcc-5.2.0/bin/g++ -shared a.o b.o -o test.so
rm a.o b.o
However, if I do:
touch a.c; make all
I got the same make execution sequence as above which is not what I expected. There is no dependency between a.c and b.c. What I expect is:
/home/utils/gcc-5.2.0/bin/g++ -Wall -Werror -fPIC -o a.o -c a.c
/home/utils/gcc-5.2.0/bin/g++ -shared a.o b.o -o test.so
rm a.o
I don't understand why b.c is compiled again. According to gnumake manual:
The first difference is what happens if the intermediate file does not exist. If an ordinary file b does not exist, and make considers a target that depends on b, it invariably creates b and then updates the target from b. But if b is an intermediate file, then make can leave well enough alone. It won’t bother updating b, or the ultimate target, unless some prerequisite of b is newer than that target or there is some other reason to update that target.
b.o is an intermediate file, it should not be compiled again since b.c has not changed.
What did I miss?
If b.o is not recompiled, then test.so cannot be created because it depends on b.o. You can't create the shared library from a.o and b.o if b.o was deleted.
If you were trying to create a static library then you could use make's special archive syntax to replace a.o without needing to recompile b.o, but that's not possible unless you use the archive special syntax, and it can't be done for shared libraries such as you're trying to build here.
There's a reason these .o files are not considered intermediate by default, and forcing them to be by adding the .INTERMEDIATE target doesn't mean you can avoid rebuilding them.
Your difficulty stems from the fact that what you mean by an intermediate file
is not what GNU Make means; but the .INTERMEDIATE special target allows you to insist
that a.o and b.o, which in your makefile are not intermediate files in GNU Make's
sense, shall be treated as if they are intermediate in GNU Make's sense, and
then you're taken aback by the consequences.
What you mean by F is an intermediate file is: F is a prerequisite of target T and
F itself has prerequisites. Thus a.o and b.o are intermediate with respect to
test.so because they are prerequisites of that target and themselves have the
respective prerequisites a.c and b.c`.
In your sense of intermediate, making the target test.so does not call for
(a.o|b.o) to be remade unless it is older than (a.c|b.c). So you are taken aback by the fact
that when a.o and b.o are made .INTERMEDIATE, GNU Make always deletes them
when it makes test.so:
b.o is an intermediate file, it should not be compiled again since b.c has not changed. What did I miss?
Chiefly you missed 10.4 Chains of Implicit Rules
Ordinarily, a file cannot be intermediate if it is mentioned in the makefile as a target or prerequisite.
However, you can explicitly mark a file as intermediate by listing it as a prerequisite of the special target .INTERMEDIATE.
This takes effect even if the file is mentioned explicitly in some other way.
So, a.o and b.o would ordinarily not be intermediate in GNU Make's sense,
because they are mentioned in your makefile as prequisites of test.so. But you can
make them be treated as intermediate, in GNU Make's sense, by listing them as prerequisites of .INTERMEDIATE - as you did.
What GNU Make means by intermediate is more technical than what you mean and
is explained in the same section of the manual:
Sometimes a file can be made by a sequence of implicit rules. For example, a file n.o
could be made from n.y by running first Yacc and then cc. Such a sequence is called a chain.
If the file n.c exists, or is mentioned in the makefile, no special searching is required:
make finds that the object file can be made by C compilation from n.c; later on, when
considering how to make n.c, the rule for running Yacc is used. Ultimately both n.c and n.o are updated.
However, even if n.c does not exist and is not mentioned, make knows how to envision it as the
missing link between n.o and n.y! In this case, n.c is called an intermediate file.
Once make has decided to use the intermediate file, it is entered in the data base as
if it had been mentioned in the makefile, along with the implicit rule that says how to create it.
(My emphasis). More briefly, if Make is required to make target output, and discovers a file input such
that:
It has no explicit rule for making output from input, but -
It knows a sequence of implicit (a.k.a builtin) rules by
which a file stage that is not a target or prerequisite in the makefile can
be made from input, and from which output can be made, then it will adopt this
sequence of rules to make output from input via stage, and stage will be
an intermediate file.
Crucially, since stage is not one of your targets, or a prerequisite of any of them, Make
knows that it is merely a disposable by-product of making output from input,
and therefore can be deleted when it has served that purpose.
Here is a simple example project involving files that are really intermediate in GNU Make's sense.
We have some yacc source yacc.y and lex source lex.l, in the project directory,
and we want to build a parser from them, parse, with the following makefile:
Makefile
YFLAGS := -d
OBJS := yacc.o lex.o
.PHONY: all clean
all: parse
parse: $(OBJS)
$(CC) $^ -o $#
clean:
$(RM) parse $(OBJS)
It runs like:
$ make
yacc -d yacc.y
mv -f y.tab.c yacc.c
cc -c -o yacc.o yacc.c
lex -t lex.l > lex.c
cc -c -o lex.o lex.c
cc yacc.o lex.o -o parse
rm lex.c yacc.c
Now you see that Make, using its catalogue of implicit rules, figured out
that yacc.o could be made by compiling the non-existent C source file
yacc.c, and that yacc.c could be produced from the existing source file
yacc.y by running yacc -d yacc.y; mv -f y.tab.c yacc.c. Likewise, it figured out that lex.o
could be made by compiling the nonexistent C source lex.c, and that lex.c
could be made from lex.l by running lex -t lex.l > lex.c. Then parse is
made from yacc.o and lex.o by the routine linkage that the makefile
specifies.
But your makefile says nothing whatever about yacc.c and lex.c. As far as
you have told Make, it does not matter to you whether or not such files ever exist.
They are intermediate files, merely stages in the .y -> .o and .l -> .o productions. So
when Make is done with them:
rm lex.c yacc.c
Then if you:
$ touch yacc.y
and again:
$ make
yacc -d yacc.y
mv -f y.tab.c yacc.c
cc -c -o yacc.o yacc.c
cc yacc.o lex.o -o parse
rm yacc.c
only yacc.o gets remade for the linkage of parse, and the one
intermediate file yacc.c that was generated this time is deleted.
Bottom line
Your object files are not intermediate in GNU Make's sense and you don't
want them to be treated as if they are. This is normal for object files.
So remove .INTERMEDIATE: $(OBJ).
I'm creating a static library that contains some objects including one that depends on sqlite3. This is my make file; it basically compiled the 3 cpp files into objects, put them into a .a lib and then use this library to get my main binary
CPPSRCS := \
$(LIBDIR)/database/active_database.$(SRCEXT) \
$(LIBDIR)/sd_card/sd_card.$(SRCEXT) \
$(LIBDIR)/led/led.$(SRCEXT)
OBJS := $(CPPSRCS:.cpp=.o)
lib/%.o: %.$(SRCEXT)
$(CXX) $(CXXFLAGS) -c $^ -o $# -lsqlite3
lib_$(APP).a: $(OBJS)
$(AR) rcs lib_$(APP).a $(OBJS)
$(APP): lib_$(APP).a
$(CXX) $(CXXFLAGS) $(SRCDIR)/$#.$(SRCEXT) -o $(DESTDIR)/$# lib_$(APP).a
My static library is built but when trying to get my binary against it I get undefined reference:
lib_XX.a(active_database.o): In function `database::ActiveDatabase::sqlite_exec_wrapper(std::string, int (*)(void*, int, char**, char**), void*)':
database/active_database.cpp:174: undefined reference to `sqlite3_exec'
database/active_database.cpp:178: undefined reference to `sqlite3_free'
lib_XX.a(active_database.o): In function `database::ActiveDatabase::init_db()':
I can see that -lsqlite3 (in /usr/lib) is not included in the compilation but I can't seem to force it to be included when I build my static library.
-lsqlite3 is ignored when compiling into object files because no linking happens.
You have three options.
You can add the SQLite object files to your static library lib_XX.a.
You can perform a relocatable link and produce a single .o file which contains the entire static library and SQLite, using ld -r.
Or consumers of your library need to link to your library and SQLite, using -l_XX -lsqlite3.
The last option is the most common approach and can be automated somewhat with tools like pkg-config.
I have been working on this problem for a while, I could use a little help:
The steps necessary to produce this program are:
Compile cpp2html.c to produce cpp2html.o. (Important: the source code in this project is C, not C++, and so must be compiled and linked with gcc, not g++.)
Run the command
flex cppscanner.l
to produce the file lex.yy.c from the language description in cppscanner.l.
Compile lex.yy.c to produce lex.yy.o. (This often produces a warning message about extra tokens. Ignore it.)
Link the the .o files to produce an executable program named cpp2html
Write a makefile that will carry out these steps. Your makefile should result in only the minimum required amount of steps when any input file to this process is changed.
these are the errors/warnings I get when compiled,
gcc: warning: cpp2html.o: linker input file unused because linking not done
gcc: warning; lex.yy.o: linker input file unused because linking not done
mv: cannot stat `a.out': No such file or directory
this is what I have in my makefile:
enter code here
#
CPPFLAGS=-g -DDEBUG
#
#
cpps2html: cpp2html.o lex.yy.o
gcc $(CPPFLAGS) -c cpp2thml.o lex.yy.o
mv a.out cpp2html
cpp2thml.o: cpp2html.c
gcc &(CPPFLAGS) -c cpp2html.c
lex.yy.c: cppscanner.l
flex cppscaner.l
lex.yy.o: lex.yy.c
gcc $(CPPFLAGS) -c lex.yy.c
This
gcc $(CPPFLAGS) -c cpp2thml.o lex.yy.o
mv a.out cpp2html
should be
gcc $(CPPFLAGS) -o cpp2html cpp2thml.o lex.yy.o
Certainly the -c option (which means "don't attempt linking") is bad here.
Side note: Using CPPFLAGS, which is conventionally reserved for options for the C preprocessor, is a bit odd in a linking command. It's not illegal, but the normal distribution is to use
CPPFLAGS for stuff that the preprocessor uses (such as -Dfoo or -Isomewhere)
CFLAGS for stuff the C compiler uses (such as -g)
LDFLAGS for linker flags (such as -Lsomewhere)
LDLIBS for libraries (-lfoo)
And then use them where pertinent (or use predefined rules, which use them appropriately). This usually means CPPFLAGS and CFLAGS when building .o targets and CFLAGS, LDFLAGS and LDLIBS when linking.
I'm trying to compile a Qt Creator project on the command line. Here's what I did.
$ qmake
$ make
g++ -c -m64 -pipe -O2 -Wall -W -D_REENTRANT -DALLOWSYNCING -DQT_NO_DEBUG -DQT_GUI_LIB -DQT_CORE_LIB -I/usr/share/qt4/mkspecs/linux-g++-64 -I. -I/usr/include/qt4/QtCore -I/usr/include/qt4/QtGui -I/usr/include/qt4 -I. -o main.o main.cpp
In file included from ./model/videostream.h:4:0,
from ./model/videostreamersession.h:4,
from view/videoplayerwindow.h:4,
from main.cpp:3:
./model/videoframe.h:5:18: fatal error: QImage: No such file or directory
compilation terminated.
make: *** [main.o] Error 1
It looks like make can't find the header files for Qt-related classes. How do I tell make where it can find them using an additional parameter or environment variable? I noticed some search paths are included by default, but in my environment they're located in /opt/QtSDK/Desktop/Qt/474/gcc/include/.
As requested, my PRO file. It was initially generated by Qt Creator so it's nothing out of the ordinary.
QT += core gui
TARGET = output
TEMPLATE = app
SOURCES += # Trimmed for brevity
HEADERS += # Trimmed for brevity
# Special build flags
DEFINES += ALLOWSYNCING
# These libraries are required for the program to operate
LIBS += -ljrtp -ljthread
CXXFLAGS="-I/opt/QtSDK/Desktop/Qt/474/gcc/include/" CFLAGS="-I/opt/QtSDK/Desktop/Qt/474/gcc/include/" LDFLAGS="/opt/QtSDK/Desktop/Qt/474/gcc/lib" make
However, you're probably on a mac I'm guessing.. In which case you should just export QT_DIR=/opt/QtSDK/Desktop/Qt/474/, and add /opt/QtSDK/Desktop/Qt/474/bin to your PATH and that should jiggle everything into place once qmake runs.