UNIX - makefile help! - unix

Question

Looking for help compiling my program below. I'm getting a "***Stop. no Targets." error when typing in limit.makefile in the compiler buffer. Ideas?
int main(int argc, char *argv[]) {
struct rlimit limit;
limit.rlim_cur = 60000;
limit.rlim_max = 60000;
if (setrlimit(RLIMIT_FSIZE, &limit) == -1){
perror("Error preventing core dump, errno=%d\n", errno);
exit(1);
}
else {
printf("The current core limit is %ll.\n", limit.rlim_cur);
printf("The core max limit is %ll.\n", limit.rlim_max);
exit(0);
}
if (getrlimit(RLIMIT_FSIZE, &limit) == -1){
printf("getlimit() failed with errno=%d\n", errno);
exit(1);
}
}
Compile command: make -k -f limit.makefile
This is what I type for the compiler buffer....still get the error though.
Makefile:
CC = /usr/bin/gcc
CFLAGS = -g -Wall -std=c99 -O2 -arch x86_64

Answer 1

Just tried that make -k -f myfile on an empty file and got your error.
If you just want it to work
CC= /usr/bin/gcc
CFLAGS = -g -Wall -std=c99 -O2 -arch x86_64
all: test.c
$(CC) $(CFLAGS) test.c
Note that the tab under all has to be a "real" tab.
I recommend you check out a makefile tutorial or just compile it from the command line.
gcc -g -Wall -std=c99 -O2 -arch x86_64 limit.c
BTW, not sure about that -arch flag. Not valid on my Linux box.

Answer 2

Try
CC = /usr/bin/gcc
CFLAGS = -g -Wall -std=c99 -O2 -arch x86_64
OBJ = limit.o
%.o: %.c
$(CC) -c -o $# $< $(CFLAGS)

Answer 3

EboMike's is more sophisticated, but here's a simpler one that is guaranteed to work for your one-file project:
CC = /usr/bin/gcc
CFLAGS = -g -Wall -std=c99 -O2 -arch x86_64
limit: limit.c
$(CC) $(CFLAGS) -o limit limit.c
You can run this with just make by itself.

Answer 4

You've not defined what the target to build is anywhere. You can do that on the command line, using the command
make -k -f limit.makefile limit
and the implicit rules of make will compile limit.c into limit. Alternatively define a target in your makefile,
CC = /usr/bin/gcc
CFLAGS = -g -Wall -std=c99 -O2 -arch x86_64
limit: limit.o
The first target will be built by default, and make knows how to compile *.c to *.o and link object files so everything else is automatic.
If you're curious, the default rules are equivalent to (in GNU make)
%.o:%.c
$(CC) $(CPPFLAGS) $(CFLAGS) -c -o $# $<
%:%.o
$(CC) $(LDFLAGS) -o $# $^ $(LDLIBS)
where $#, $< and $^ expand to the target, first prereq and all prereqs respectively, the percent signs are wildcards for the target name.