I'm trying to write a makefile for compiling and simulating some vhdl code.
Is there a way to create a project from linux/windows command line ?
It is straightforward if you open the tool and run "project new" but there's no documentation for doing it from the command line.
I don't know how to use the project command directly from command line. But I've another method to do it. If you are into command line, you might know it already.
Anyway, you can write a .do file which contains the project commands then use vsim -c -do filename.do to execute it.
for example, my filename.do contains "project new . pro_name"
My recommendation would be not to use projects, they will get in the way.
As Rakend already mentioned just use .do files which are simple and you have a full Tcl interpreter to your disposal if you want to do some extra stuff.
If you want to use makefiles then compile your code manually and then run vmake to create the Makefile for you. However, vcom/vlog are quick so .do is all you need.
Good luck,
Hans.
Related
Is it possible to create an executable file where I can just upload the excels and an output is generated based on the coding and without sharing it as well.
On Linux or OSX you can make an R script double clickable with the shebang trick:
Add #!/usr/bin/Rscript as the first line
Make the script executable with chmod +x
On OSX, there is also the option to convert an R script into an application bundle with Platypus. On Windows, I do not know whether this is easily achievable at all, especially as executables usually are not placed in the search path on Windows.
is using R-Shiny apps can cover that? Its an R based program and you can customize the output / logic there.
On windows after running the grunt build command for creating brackets shell it gives done without errors but i dont see any .exe file generated..
What might be the problem???
Here are some possible solutions:
Are you following the full brackets-shell build instructions, including all prerequisites?
Make sure Brackets isn't running at the same time. The build will fail silently if the .exe file is currently in use (see bug).
Try with a fresh git clone of the repo. If your brackets-shell local copy has been around for a while, sometimes the build & deps folders can get in a bad state. (I'm assuming you haven't modified the source at all. If you have, try with an unmodified copy of the source first to make sure it builds correctly without any of your changes).
Check that python --version shows 2.7.x
Verbose build output would also be helpful in diagnosing issues like this, but unfortunately there's not yet an easy way to get that...
If you follow the instructions on bracket-shell's wiki page, the Windows executable should be created in the Release directory.
The simplified version of my question is how can I achieve a command such as the following.
gvim --remote-tab-silent -c mak
When I run this command I am hoping for a new tab to be opened, and to have the make command run. What actually happens however is there are two new tabs "-c" and "mak"
Is there a way to do this? My end goal is to be able to within vim run a command such as this to give me asynchonous make output.
!gvim --remote-tab-silent -c mak
Thanks in advance.
--EDIT--
I found the documentation for --remote, which explains how to do a remote command with opening a file. The syntax applies to remote-tab apparently.
To do what I want I am now using
gvim --remote-tab-silent +mak MakeOutput
Similarly inside vim I can use
!gvim --remote-tab-silent +mak
MakeOutput
It automatically opens the first error in a file for me, which is convenient I would think :)
It seems like what you're asking is how to execute commands asynchronously with updates when they complete.
Have a look at my AsyncCommand plugin. It's just wraps the vim syntax required to execute something and load it with --remote. I've uploaded AsyncCommand 2.0 that includes an AsyncMake command.
Add the script to your .vim/plugin and you can build with :AsyncMake or :AsyncMake target. Errors will be opened in your quickfix once the make completes.
I am using qmake to generate MinGW32 Makefiles for a small Qt C++ app we are developing. My problem: all those dual/quad core CPUs are sitting there idly while only one thread is doing the building. In order to parallelize things I tried passing --jobs 4 to make, but the problem is that qmake generates a generic makefile inside of which make gets called again with -f .
Is it possible to force qmake to add options to make when generating the makefile? Or maybe there's another way of setting the option outside of qmake altogether? I can't edit that specific Makefile since it's autogenerated each build.
Abusing $MAKE to pass options does not work in all cases. Oftentimes, (e.g. in the configure script of Qt on Unix), it's enclosed in double quotes ("$MAKE") to allow the command to contain spaces. I know because I used the same trick before it stopped working. Qt Support then suggested (rightfully) to use $MAKEFLAGS as in
set MAKEFLAGS=-j4
make
This works for me:
set MAKE_COMMAND=mingw32-make -j%NUMBER_OF_PROCESSORS%
The generic Makefile uses $(MAKE) when invoking make, so you can overwrite it using environment variables. Something like this should do it:
qmake
make MAKE="mingw32-make -j4"
Replace the values of MAKE as required of course :)
I need something like make i.e. dependencies + executing shell commands where failing command stops make execution.
But more deeply integrated with shell i.e. now in make each line is executed in separate context so it is not easy to set variable in one line and use it in following line (I do not want escape char at end of line because it is not readable).
I want simple syntax (no XML) with control flow and functions (what is missing in make).
It does not have to have support for compilation. I have to just bind together several components built using autotools, package them, trigger test and publish results.
I looked at: make, ant, maven, scons, waf, nant, rake, cons, cmake, jam and they do not fit my needs.
take a look at doit
you can use shell commands or python functions to define tasks (builds).
very easy to use. write scripts in python. "no api" (you dont need to import anything in your script)
it has good support to track dependencies and targets
Have a look at fabricate.
If that does not fulfill your needs or if you would rather not write your build script in Python, you could also use a combination of shell scripting and fabricate. Write the script as you would to build your project manually, but prepend build calls with "fabricate.py" so build dependencies are managed automatically.
Simple example:
#!/bin/bash
EXE="myapp"
CC="fabricate.py gcc" # let fabricate handle dependencies
FILES="file1.c file2.c file3.c"
OBJS=""
# build link
for F in $FILES; do
echo $CC -c $F
if [ $? -ne 0 ]; then
echo "Build failed while compiling $F" >2
exit $?
fi
OBJS="$OBJS ${F/.c/.o}"
done
# link
$CC -o $EXE $OBJS
Given that you want control flow, functions, everything operating in the same environment and no XML, it sounds like you want to use the available shell script languages (sh/bash/ksh/zsh), or Perl (insert your own favourite scripting language here!).
I note you've not looked at a-a-p. I'm not familiar with this, other than it's a make system from the people who brought us vim. So you may want to look over that.
A mix of makefile and a scripting language to choose which makefile to run at a time could do it.
I have had the same needs. My current solution is to use makefiles to accurately represent the graph dependency (you have to read "Recursive make considered harmful"). Those makefiles trigger bash scripts that take makefiles variables as parameters. This way you have not to deal with the problem of shell context and you get a clear separation between the dependencies and the actions.
I'm currently considering waf as it seems well designed and fast enough.
You might want to look at SCons; it's a Make-replacement written in Python.